Power consumption in analog circuits
Power consumption is one of the main challenging issues in modern electronic equipments. Its reduction looks like to be more challenging when designing low-voltage analog integrated circuits in deep sub-micron technologies, especially operational amplifiers (opamps). At the first glance, reduction of supply voltages and transistor dimensions seems to be effective in lowering opamp power consumption. However, as there will be less room for the signal, to keep the same signal-to-noise ratio the power should be increased. Moreover, as lower available power supplies prevent the designers to stack adequate transistors upon each other, it becomes quite difficult to satisfy both the required DC gain and voltage swing with single-stage amplifiers. As a result, multistage opamps with more power-hungry branches might be inevitable.
Two-stage opamps are used widely in industry to achieve high DC gain and high output voltage swing together. To avoid instability in the negative feedback loop, the opamp frequency response should be appropriately compensated. Several compensation techniques have been proposed to stabilize a two-stage amplifier. For a particular value of power consumption, each technique makes a trade-off between stability and bandwidth. How much the trade-off is determines the benefit of one scheme over another.
When Miller compensation is applied to a two-stage opamp, a compensation capacitor is placed between the input and output of second stage. The capacitor has a pole-splitting action which moves one pole to lower frequencies and the other one to higher frequencies. This increases the closed-loop stability, but lowers the opamp bandwidth. In general, the main drawbacks of Miller compensation are low power efficiency, low power supply rejection ratio (PSRR), and large value of required compensation capacitor. The feedforward current flow through the compensation capacitor toward the output is another issue in Miller-compensated amplifiers.4 The current introduces a right-half-plane (RHP) zero to the transfer function which reduces the closed-loop stability. The reason why this feedforward current degrades the stability is that it tries to pass the signal to the opamp output by bypassing the second stage. This nullifies the 180◦ phase shift by the second stage and reverses the output polarity. Equivalently, it forces the negative feedback to become positive. Hence, the output sign inversion occurs at lower frequencies with higher absolute loop-gain value and lower phase margin. A nulling resistor is applied in series with the compensation capacitor to avoid bypassing the second stage with this current. The resistor increases the feedforward path impedance and equivalently moves the RHP zero to higher frequencies. However, in practice, the value of the resistor is affected by temperature and other variations in device fabrication, which results in more variations in opamp’s stability. Due to this, another method to reduce the effect of the RHP zero, called as cascode compensation is proposed. Instead of a nulling resistor, it employs a current buffer in series with the compensation capacitor. The current buffer tries to decrease the feedforward current by conducting it directly to the second-stage input. Correspondingly, it tries to push the RHP zero to higher frequencies.4 Compared to the previous method, it offers some advantages. First, as the parameters of current buffers are less sensitive to the variations, the structure robustness increases. Second, for a particular bandwidth, it results in higher PSRR and lower power consumption. Nevertheless, these advantages are at the cost of higher complexity during the design and optimization of these topologies. Perhaps, the main reason for such complexity is the increase in the order of the system due to the practical implementation of current buffers. Correspondingly, the analysis of such systems becomes more complicated.