PLL for Wireless Sensor Nodes in 65 nm CMOS
FREE-DOWNLOAD S Drago, D Leenaerts, B Nauta… – Solid-State Circuits, …, 2010
Abstract—The design of a duty-cycled PLL (DCPLL) capable of burst mode operation is
presented. The proposed DCPLL is a moderately accurate low-power high-frequency synthesizer
suit- able for use in nodes for wireless sensor networks (WSN). Thanks to a dual loop