VHDL standards
1076.1–1999: VHDL-AMS (Analog & Mixed-Signal Extensions)
1076.2–1996: Std. VHDL Mathematics Packages
1076.3-1997: Std. VHDL Synthesis Packages
1076.4-1995: Std. VITAL Modeling Specification (VHDL Initiative Towards ASIC Libraries)
1076.6-1999: Std. for VHDL Register Transfer Level (RTL) Synthesis
1164-1993: Std. Multivalue Logic System for VHDL Model Interoperability